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Paper on Novel Sketch Maintenance System Accepted in PVLDB

Paper über neues Sketch-Maintenance-System zur Veröffentlichung in PVLDB Vol. 14 akzeptiert

Dies ist eine deutsche Testübersetzung eines Blocks.

In their paper, the authors propose Scotch, a novel system for accelerating sketch maintenance using the custom FPGA hardware. Scotch provides a domain-specific language for the user-friendly, high-level definition of a broad class of sketching algorithms. A code generator performs the heavy-lifting of hardware description, while an auto-tuning algorithm tunes the summary size. Our evaluation shows that FPGA accelerators generated by Scotch outperform CPU- and GPU-based sketching by up to two orders of magnitude in terms of throughput and up to one order of magnitude in terms of energy efficiency.

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